Amd Hosts Epyc Rome Launch Event on August 7
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The company's plans for the EPYC architecture were to win big in the server market. AMD's current chiplet design for Zen 2 has been specially designed to address the performance disadvantages of existing EPYC processors, especially when it comes to memory latency and uniformity.
EPYC ROME will perform on August 7
During the 2019 second quarter earnings call, AMD CEO Lisa Su confirmed that the company's 7nm ROME processors will be released on August 7 at a special event.
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AMD's EPYC ROME processors are designed to provide 2x boost in cores / threads per socket, offering a maximum of 64 cores and 128 threads with second generation EPYC. Additionally, AMD also promises a 2-fold increase in floating point performance, which when combined with the increase in core numbers, could produce a 4-fold increase in compute density.
One of the key design improvements to AMD's EPYC processors is the use of a 14nm I / O chip to provide access to the eight-channel memory, unifying memory access for each of Zen 2's chips. ROME. This is very different from Zen 1, where each of the EPYC CPU clusters offered access to two memory channels. This required memory information to be shared between CPU arrays, resulting in uneven latencies, an issue that is resolved with ROME.
At this time, we don't know what AMD will show at the EPYC ROME launch. All we know is that the event is on August 7. We will keep you informed.
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