Intel announces new xeon cascade lake with up to 48 cores
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Intel has announced the next family of Xeon Cascade Lake processors that it plans to launch in the first half of next year. The new parts represent a substantial improvement, with up to 48 cores and 12 channels of DDR4 memory per socket, supporting up to two sockets.
Intel Xeon Cascade Lake will have a non-monolithic design
These Cascade Lake processors offer a higher level of performance than Xeon's Scalable Processors (SP). Today's Xeon SP chips use a monolithic die, with up to 28 cores and 56 threads. Instead Cascade Lake AP will be a multi-chip processor with multiple dies in a single package. AMD is using a similar approach for its comparable products, with EPYC processors using four dies in each package.
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The move to a multi-chip design is likely because as the arrays get bigger and bigger, they are more likely to contain a defect. Using several smaller dies helps prevent these defects. Because Intel's 10nm manufacturing process is still not good enough for mass market production, the new Xeons will continue to use a version of the company's 14nm process. The huge amount of memory channels will require a huge socket, which is currently considered a 5903 pin connector.
In particular, Intel is listing just one core count for these processors, rather than the usual core and thread count combination. It is unclear if this means that the new processors will not have HT, or if the company prefers to emphasize the physical cores and avoid some of the security concerns that HT may present in certain usage scenarios.
Overall, the company claims 20 percent performance improvement over current Xeon SPs and 240 percent over AMD's EPYC, with higher gains in workloads requiring heavy bandwidth usage. memory. The new processors will include a series of new AVX512 instructions designed to improve the performance of working neural networks.
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