Intel pentium 4: history, what I mean on the pc and its influence

Intel Pentium 4 was a radical change in the PC world and is that with the end of a whole decade lurking around the corner, this is an ideal moment within a portal such as Professional Review to take stock of what has led us to where we meet today.

The vehicle for this trip will be the jump from Netburst to Nehalem on Intel processors; or what is the same, the farewell of the Pentium 4 processors, going through the Core 2 (and Core 2 Quad) before the current Intel Core. A journey of more than two decades and whose foundations we may not see soon. Not surprisingly, the story is said to be an incenseare to start again.

Index of contents

Intel Pentium 4: The End of a Decade

The launch of Conroe (2007) was a true milestone for Intel. It was the farewell on desktop of Netburst (micro-architecture), which until now had articulated the mythical Pentium 4; as well as the return (in a way) to the P6 micro-architecture, on which the first Intel Core would be based. Although the jump occurred before through Pentium M on laptops.

The abandonment of Netburst brought with it the abandonment of its high frequencies, as well as the technologies developed for it (such as Hyper-Threading ) in the short term; but this was not an arbitrary decision.

Pentium 4. Image: Flickr, JiahuiH

The benefits of Pentium 4s were drowned out by its serious temperature and scalability problems, which made Netburst micro-architecture unfeasible for laptops and servers, two markets as powerful at the time as today.

Intel Pentium 4 with Netburst and data segmentation

These problems that Netburst presented derived mostly from the huge data pipeline through which the micro-architecture operated and from the problems with the prediction of instructions.

Roughly, instruction segmentation ( data pipeline in English) is a method to decompose the execution of a processor instruction in stages and thus increase its speed. Without this segmentation we would have to wait to finish executing one instruction before starting the next, a very slow process. With this segmentation we can start each stage as it ends.

Netburst had an instruction pipeline of more than 20 segments (31 in later reviews) constantly keeping the processor busy and giving rise to the high frequencies that made Pentium 4 famous.

Unfortunately, such a long line was very detrimental to the already named instruction prediction, since if this prediction failed, the number of stages the processor had to redo was huge. Furthermore, maintaining such high frequencies inefficiently brought with it a serious temperature problem. Intel ran into a physical wall that was unable to jump with this architecture.

Core architecture through Conroe

It was as a result of these problems that we saw the birth of Core micro-architecture. Intel took a step back and rethought its development strategy; They would no longer seek the highest possible frequencies, but maximum efficiency through a small and functional set.

They found this efficiency by developing the experiment performed with the Pentium M processor, derived from the already named P6 micro-architecture, Netburst's predecessor.

DIE interior of a Core 2 Duo.

Pentium M shares many similarities with what would later become Core, such as the 12-stage instruction set (increased to 14), or the L2 memory layout (subsequently increased). In addition, it increased the number of execution units to four, and introduced new technologies focused on its scalability, such as Micro-Core.

Intel released under Conroe in 2007 the Intel Core 2 Duo processors, highlighting the E6400, E6600 and X6800 models in the extreme range; as well as different iterations of the architecture for different purposes, where Merom stands out for the portable market and Kentsfield for its quad-core processors, the Core 2 Quad (highlighting the Q6600).

Nehalem: the "tac" after the "tic"

In 2007 Intel introduced the curious "tic-tac" model. Long-term planning (commonly called roadmaps ) for the development and launch of your architectures. In this model, the "tic" corresponds to the improvement in the manufacturing process (reduction of the DIE), while the "tac" is attributed to changes in architecture.

The tac after Conroe's launch was Nehalem, the architecture that would bring the first modern Intel Core processors to life, as well as welcoming the i3, i5 and i7 brands.

A generational leap in the Intel series

Conroe lived several revisions throughout its two years of life: Wolfdale, Yorkfield or Woodcrest are some examples, but the first generation jump jump within Intel Core would be Nehalem.

This architecture followed the same principles of efficiency and scalability that Intel sought after moving away from Netburst, but it rescued some of the characteristics that defined this micro-architecture.

Intel Pentium inside Nehalem

The interior of Nehalem. Image: Appaloosa (Wikimedia Commons)

With Nehalem the pipelines with more than twenty stages would return, as well as technologies such as Hyper-Threading ; but prediction problems also disappeared, thanks to the use of a second-level predictor and the improvement of other related technologies, such as the loop detector. In addition, some of the characteristics that defined Conroe were maintained, by dragging the bases of this architecture with it.

To avoid the problems of the past, Intel began to apply a proportion rule from the architecture development itself, all the features of the architecture that increase the consumption of the processor should have a double impact on its performance.

Furthermore, it was an architecture developed with modularity in mind. The cores that made up each chip were independent and replicable, making it easy to create processors with different core configurations and expand the architecture to the portable market or server world.

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With Nehalem, Intel was aware of not falling into the same Netburst problems. A goal that we believe he was able to achieve.

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