The euv manufacturing processes at 7 nm and 5 nm have more difficulties than anticipated

The advance in the manufacturing processes of silicon chips is becoming more complicated, something that can be seen with the same Intel that has had great difficulties in its process at 10 nm, which has led it to greatly stretch the life of the 14 nm. Other smelters such as Globalfoundries and TSMC are reportedly having more difficulties than anticipated in the jump to 7nm and 5nm processes based on EUV technology.

More problems than anticipated with EUV processes at 7nm and 5nm

As Intel, Globalfoundries and TSMC move towards manufacturing processes of less than 7nm with 250mm wafers and use of EUV technology, they are encountering several more difficulties than anticipated. Process yields at 7nm with EUV are not where manufacturers want to be yet, something that will be further taxed with the move to 5nm with several different anomalies arising in test production. It has been said that it takes days for researchers to scan for defects on the 7nm and 5nm chips.

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Various printing problems are emerging in critical dimensions of around 15nm, needed to make 5nm chips, the actual production of which is expected by 2020. EUV machine manufacturer ASML is preparing a new next-generation EUV system Dealing with these found print defects, but those systems are not expected to be available until 2024.

Added to all of the above is another difficulty related to EUV-based manufacturing processes, the underlying physics behind it. Researchers and engineers still do not understand exactly what interactions are relevant and occur in the engraving of these extremely fine patterns with EUV lighting. Therefore, it is to be expected that some unforeseen problems will arise.

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