Sk hynix shows the first details of the ddr5 memories
Table of contents:
- DDR5 - Double the bandwidth and double the density of DDR4
- The more technical details of how it works
SK Hynix shows details of its first DDR5 chip. The standard is officially under development by Jedec, and it looks like it will appear very soon.
DDR5 - Double the bandwidth and double the density of DDR4
DDR5 - or Double Data Rate 5 - is still under development in the Jedec standards organization and will offer twice the bandwidth and twice the density of DDR4, plus higher efficiency per channel.
The standard was expected to be finalized in 2018, but that work is still ongoing. DDR5 would be ready for use later this year as reported by eetimes . Hynix-designed DDR5 modules use a 16 Gb to 6.4 Gb / s / pin SDRAM that operates at 1.1 V and measures 76.22 mm2. The memory is manufactured with a DRAM and 1ynm process.
The more technical details of how it works
Jedec announced earlier this week the release of the LPDDR5 standard, which will eventually operate at an I / O speed of 6, 400 MT / s, 50% higher than the first version of LPDDR4. Memory speed and efficiency are expected to increase for applications such as ultra-thin smartphones, tablets, and laptops.
The arrival of DDR5 memory modules seems like the logical step towards DDR4, which began its journey back in 2013. Six years later we are on the eve of a new generation of RAM, which should help to take full advantage of the Next-gen AMD and Intel processors.
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