Amd ryzen 3000: everything we know so far

We are going to be able to see what it means to go from the initial 14 nm of 2 years ago to the 7 nm of today, or what is the same: see if AMD fulfills its promises in relation to the absolute difference between the way of designing and manufacturing processors before ZEN and their ZEN .

- Will they be able to double the density by reducing the node to 50%? Are they going to maintain the price in relation to the number of cores that there were before against those that are going to be now (up to double in the same space - for the same price as the previous generation)? core gain / no gain or maximum frequency loss?

Index of contents

How ZEN takes advantage of downscaling

Once the design and architecture (use of the ZEN core within CCX + Infinity Fabric and modularity) was defined at the beginning of the roadmap, whenever the factories are able to reduce the node, we will repeat the initial scheme on the new scale.

By reducing the node, either the new CCX will house more cores, or the number of CCXs will double with the original number of cores. For the purposes of Infinity Fabric, it allows to interconnect 'everything with everything', with the price to pay for taking up more space in addition to demanding consumption proportionally as well.

As always, with 7 nm, more zen cores will be obtained from each wafer. Infinity Fabric is designed to allow the interconnection of zen cores and ccx.

Nothing changes. Exactly the same. But it fits more in the same space. And it is designed from the beginning, hoping that it will happen not once, if not every time that factories are capable.

This is "growing inward. " The original concept of ZEN was based on achieving in a 1P processor what was currently on the market embodied in a 2P solution. Or in a 2P (2 Naples on a dual socket motherboard) what was in a 4P until then. The savings in all the components already had to be very remarkable.

We can say that the benchmark for ZEN is the server processor. But built in a flexible and cheap way that allows modularity to adapt it easily and without cost to be able to defend itself in all segments, lowering the number of cores / ccx with respect to the theoretical maximum of a perfect unit.

At the end of the presentation of EPYC 7nm at CES, Lisa Su advanced the configuration of the chip in her Consumer version: Ryzen.

Incidentally, the number of “valid” zen cores obtained from each wafer is maximized. This allows us to provide a very competitive price or, failing that, to obtain a very high profit margin, something that AMD has neither done nor is in a position to undertake (they do not want to commit suicide) in their intention to gain significant market share in all of them. the segments.

Being economical is a premise at ZEN. It must maintain the price or become cheaper as the roadmap progresses and the milestones are being exceeded.

Before ZEN, thinking about processors with a high number of cores made us think of complex CPUS (interconnection buses) and very expensive.

Likewise, to think that the number of nuclei grew and grew as if it were the most normal thing in the world was science fiction, if not nonsense.

And this made all the sense in the world based on the construction and operation of pre-Zen processors in which the maximum frequency is the most important part as well as the key parameter to grow (offer more performance) in the next generation.

Power efficiency. Don't expect zen 2 to lend itself to extreme overclocking any differently than its predecessor.

That ZEN processors increase the number of cores is not and will not be anything remarkable. It is its operating base (not the maximum frequency). Trying to proportionalize the number of times it exceeds the number of cores to monolithic processors and assume that the result should be the number of times it exceeds them in performance is an error.

They can always win or lose both ends. It all depends on the software that manages the resources and whether it prioritizes or weighs down single core or multi core.

Specific news

Parallel to the execution of the roadmap, sticking to the original design and technologies, AMD continues to experiment and develop new solutions to alleviate the weak points of its ZEN architecture and / or improve performance, keeping in mind the direction in which they are heading (many more). nuclei).

Latency can be improved by accessing non-unified / uniform memory, communication between cores inside the ccx and outside them through Infinity Fabric.

The chiplet

When the number of cores begins to be really important, we find that there is a redundant part that must be present in all of them, it occupies valuable space and also does not allow making the most of what can be obtained from each wafer.

Either measures are taken or it will not be possible to double the density in the same space or to be as economical as possible.

So AMD opts to manufacture with the 7nm TSMC DIES exclusively computational where the communication modules are not present and continue to use the mature and optimized 12nm from Global Foundries to manufacture a DIE in which all the elements are present that are 'missing' in the computational DIES, bringing together in an I / O DIE all the interconnection components of each core / ccx.

Thus, in each CPU, the desired number of computing dies can be flexibly included in addition to a single I / O die. APUs as reported to date, will not be built using chiplets.

It is believed that in this way the synchronization clock between all the cores, wherever they are, will be able to be unified, unlike what happened with the design that we have seen so far, in which depending on between which components and which memory (either core or CCX shared) might not be uniform / unified.

Backward compatibility

The operating requirements of the first 4 generations of ZEN (the first 2 with zen and the second 2 using zen 2), must be kept within the parameters dictated from the beginning.

The compatibility of the socket, the maximum consumption that could be demanded or the maximum number of memory channels cannot be exceeded.

If you cannot use any of the existing boards with the 7nm processors because they are not compatible according to the manufacturer (who would be happy to favor this and sell you a new board), it will be necessary to delve deeper to conclude which component of the board is the one that does not It allows the CPU to work, even though it is compatible.

This can happen especially if in some model they have decided not to include the sufficient number of components that allow to control the voltage very precisely at all times. Exactly the same with the options that the manufacturer should enable in the UEFI (on all series, not just on faces).

ZEN processors make constant use of auto overclocking using their SenseMI, so if the boards are not capable of correctly managing this feature, the apparently high stock voltage and their respective vdroop / vdrool may become unstable systems, BSOD, etc.

LLC and offset management is a must in ZEN processors.

In each generation, AMD seems to fine tune the XFR and PBO curve to constantly go up and down to the limit, each time with intervals that allow for greater precision. If an old plate comes a moment in time, when it does not have the resources to spin as fine as the next Zen processor could do later… we will find the 'incompatibility' problems that we have heard lately. But it also falls within the logic… everything is a matter of perspective.

New Chipsets?

In the first generation of ZEN we have had three ranges of motherboards / chipsets, which you are sure to know, as well as their specifications and differences. A320 / B350 / X370 + B450 / X470

If the new Ryzen 3000 CPUs are included, the logical and only way to preserve the promise of compatibility discussed with the previous ones, would be to add new chipsets.

This scenario, yes, would allow to reach certain performance or use of new characteristics of the 7nm processors that would be impossible in the previous boards, to meet the requirements established at the time, but not those that were hypothetically needed 2 years later (which are not fortune tellers).

Increasing the maximum speed of compatible memory is usually the first thing that comes to mind with what the motherboard manufacturers will offer us (How much will it improve?) But we will have to be vigilant to see if there are surprises with the PCIe LANES, the support PCIe 4.0 and other factors to consider.

PCIe 4 for heterogeneous use of cores.

Also at first it was speculated that there would be a specific chipset for the APUs and their particular needs, and we never saw it… so until they present the news of the new chips, we will not be able to know or guess if all the specifications will be available in the Compatible boards or some (the most powerful), will need to be done with a board refresh and in the process calm the manufacturers of these components a bit, who have been used to offering the shift board for each iteration of the Intel CPU for decades. Money for them and expenses for us…

If we delved (which we will not do here) in the possibilities and requirements of heterogeneous use of ZEN and VEGA / NAVI (being in a dedicated GPU, or not), possibly a new or more chipsets would be almost mandatory to be able to manage this type of processing in which CPU and GPU merge.

AMD Ryzen Series 3000

For what we discussed above, we can ask ourselves some questions about from where and to where (number of cores and configuration) AMD can cover with its new Ryzen 3000.

And if with its 3 ranges (Ryzen 3, Ryzen 5 and Ryzen 7) it will manage to position all the SKUs of the 7nm processors or modify them (it will increase). Let's keep Ryzen Threadripper a little on the sidelines, not forgotten.

We can expect processors from 4/4 cores until 16/32. Or maybe not… Until we know the number of cores for the Core Zen 2 and the new CCX, we are really making castles in the air.

Not to mention that, we have to consider the possibility that some configurations of number of determined cores can continue having continuity being covered with 12 nm technology (sacrilege?), And therefore remain in generation 2000.

Let's remember that AMD is a large company. Neither would it be very smart to migrate because the entire portfolio at 7nm would be the most expensive, and still maturing, becoming too much in the hands of a single factory, something that would weaken it compared to its current position in which it takes advantage of its fabless condition.

AMD Ryzen 3, Ryzen 5, Ryzen 7 and Ryzen 9 models that we expect

AMD Ryzen 3000
Model	Cores / Threads	Base / Boost Clock	TDP	Assumption Price
Ryzen 3 3300	6/12	3.2 / 4 GHz	50 W	$ 99.99
Ryzen 3 3300X	6/12	3.5 / 4.3 GHz	65 W	$ 129.99
Ryzen 3 3300G	6/12	3 / 3.8 GHz	65 W	$ 129.99
Ryzen 5 3600	8/16	3.6 / 4.4 GHz	65 W	$ 179.99
Ryzen 5 3600X	8/16	4 / 4.8 GHz	95 W	$ 229.99
Ryzen 5 3600G (APU)	8/16	3.2 / 4 GHz	95 W	$ 199.99
Ryzen 7 3700	12/24	3.8 / 4.6 GHz	95 W	$ 299.99
Ryzen 7 3700X	12/24	4.2 / 5 GHz	105 W	$ 329.99
Ryzen 9 3800X	16/32	3.9 / 4.7 GHz	125 W	$ 449.99
Ryzen 9 3850X	16/32	4.3 / 5.1 GHz	135 W	$ 499.99

* Table source

Much more than a Tick

If what was said at the beginning of the idea of "how Zen technology is based" and the novelties of putting the use of chiplets to build modular cpus are not combined, it could be much more predictable what AMD will teach us within a very long time. little with Ryzen 3000, but realistically, it is not.

Keeping it partially hidden until the last moment is its trump card, and that's why there are a lot of things we don't know in this 'all we know'.

We recommend reading the best processors on the market

In any case, I hope that even without currently being able to nail the final number, you can have a general idea of where they want to direct us. What do you expect from this new generation AMD Ryzen 3000? Will it live up to the expectations created? There is little left to know!