Amd and xilinx have worked together on the implementation of the hbm reports
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An interesting story has come to light about the public cooperation that has happened between AMD and Xilinx regarding HBM memory. Both companies have been cooperating for years on next-generation memory interfaces, with Xilinx working closely and helping AMD with some of its obstacles with HBM memories.
The future of AMD and Xilinx goes through the HBM memories
Increasing memory bandwidth is the key to the high-performance graphics AMD is looking for, deep learning, high-quality video processing, and artificial intelligence. Stacking memory chips to increase bandwidth is no small feat, and the two companies have worked together to fix the hurdles.
We recommend reading our post on HBM3 memory offers twice the bandwidth of the second generation
Last year AMD released its Vega chips and Xilinx released Virtex UltraScale +, both based on HBM 2 memory technology. Xilinx Virtex UltraScale + VU37P is currently the world's largest and fastest HBM memory FPGA. The future according to Xilinx is in heterogeneous computing, the same vision that AMD shares. A few months ago, Fudzilla managed to speak separately with Xilinx CEO Victor Peng and AMD CTO Mark Papermaster about next-generation data sets. Both agree that the future lies in heterogeneous computing and that memory and fast interconnects are required. So it is no surprise that the two companies cooperated on some important technologies like HBM 2.0.
Xilinx CEO Victor Peng was vice president of silicon engineering at ATI and later worked as corporate vice president of silicon engineering for GPG from 2006 to 2008, so he knows the graphics workloads, data sets, and your memory needs.
The future of Xilinx, Nvidia and AMD definitely has HBM 3 memory associated with it, but this memory is not expected before 2019/2020.
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