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Intel gives details on cxl, its response to nvlink connection

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CXL (Compute Express Link) is an ambitious connection interface technology for removable devices with high bandwidth. Basically, it is designed to overcome many of the technical limitations of PCI-Express, the least of which is bandwidth.

Intel CXL will use PCIe 5.0 32 Gbps lines

Intel has designed the CXL interface thinking about its 'Xe' graphics, especially in data center environments, an interconnection that is special similar to NVLink or InfinityFabric. CXL development is also driven by major compute accelerator companies, such as NVIDIA and AMD, which already have similar interconnects. At a dedicated event called "Interconnect Day 2019", Intel gave a technical presentation that explains in detail how CXL works.

Many technical details

Intel created the CXL connection interface to supplant PCI-Express in data center environments, since they allow higher bandwidth, more connected devices and lower latency, to a greater extent. Latency is the biggest enemy of shared memory pools that span multiple physical computers. CXL is designed to overcome many of these problems without ruling out the best part of PCIe: simplicity and adaptability.

Intel sees CXL as an alternate protocol that runs on top of the physical layer of PCIe. Intel CXL will initially use 32 Gbps PCIe 5.0 lines, but Intel plans to upgrade to PCIe 6.0 later (and theoretically beyond) to scale.

Intel boasts that CXL offers lower latency than other interconnect options.

The industry is moving towards consistent cache protocols, and large original equipment manufacturers such as Dell EMC and HPE are pushing for it. We hope to hear more about the Intel CXL in the future, but it's still early days. The recent launch of 2nd generation Intel Xeon included PCIe 3.0. We expect Cooper Lake to have PCIe Gen4 later this year and through 2020, and then incorporate Intel server CPUs to support PCIe 4.0 by 2020. AMD, meanwhile, will be releasing EPYC 'Rome' with PCIe 4.0 in a few months.

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