Intel gen12, more details on the new graphical architecture of intel
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Some Information on Intel's upcoming Gen12 (aka Xe) graphics architecture has appeared through recent Linux patches. Gen12 would have a new display function called Display State Buffer.
Intel Gen12 would add a new Display State Buffer (DSB) function
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It is also interesting that Linux already has support for Intel Gen12 GPUs, which indicates that the launch of processors with this architecture will be arriving sooner rather than later.
Additional information on Gen12 has been released. According to a GitHub request, Gen12 will be one of the biggest ISA updates in the history of Gen architecture: “Gen12 is slated to include one of the most in-depth Intel EU ISA revisions since the original i965. The encoding of almost all instruction fields, hardware opcodes, and record types needs to be updated in this request. But probably the most invasive change is the removal of the hardware registry marker logic, which means the EU will no longer ensure consistency of data between registry reads and writes, and will require the compiler to sync instructions dependents at any time there is a potential risk to the data. "Twitter user @miktdt also noted that Gen12 will double the number of EUs from 8 to 16, which probably helps expand the architecture."
It seems very technical data, but, in summary, Gen12 will mean big changes within Intel's graphics architecture when it debuts at Tiger Lake and then on 'discrete' graphics cards in 2020.
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