Manufacturers are already planning 3d manufacturing 120/128 layer nand
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Chipmakers have stepped up development of their respective 120- and 128-layer 3D NAND technologies to increase cost competitiveness, and are preparing to take that leap through 2020.
The 120 and 128 layer 3D NAND modules are already in process
Some of the leading NAND chip makers have delivered samples of their 128- layer chips for volume production during the first half of 2020, the sources said. Continual declines in NAND flash technology prices, along with increasing uncertainty on the demand side, have led manufacturers to accelerate their technological advancements for cost reasons.
SK Hynix began testing its 96-layer 4D NAND flash in March, Toshiba and Western Digital already had plans to introduce the 128-layer technology, built on Triple Level Cell (TLC) process technology to increase density, avoiding the same time performance issues with current QLC (Quad Level Cell) implementations.
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The fall in market prices for NAND flash technology is giving profitability problems to chip makers. Industry leader Samsung Electronics is no exception, as the vendor's NAND flash technology business has seen huge declines in profits, nearly reaching break-even point.
Samsung and other major chipmakers have started cutting production since late 2018 with the goal of stabilizing prices for NAND flash technology, but the efforts have barely worked, as the 64-layer 3D NAND process is already a technology. ripens and there is a large over-stock of it, sources said.
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