Tsmc to start manufacturing 'stacked' 3d chips in 2021

TSMC continues to look to the future, confirming that the company will begin mass production of the next 3D chips in 2021. The new chips will use WoW (Wafer-on-Wafer) technology, which comes from the company's InFO and CoWoS technologies.

TSMC will start manufacturing 3D chips

The slowdown in Moore's law and the complexities of advanced manufacturing processes, combined with today's growing computing needs, have put technology companies in a dilemma. This has forced to look for new technologies and alternatives to only reduce nanometers.

Now, as TSMC prepares to produce processors using its 7nm + process designs, the Taiwanese factory has confirmed that it will switch to 3D chips in 2021. This change will allow your customers to "stack" multiple CPUs or GPUs together within the same package, thereby doubling the number of transistors. To achieve this, TSMC will connect the two different wafers in the matrix using TSVs (Through Silicon Vias).

TSMC will connect the two different wafers of the matrix using TSVs

Stacked dies are common in the storage world, and TSMC WoW will apply this concept to silicon. TSMC has developed the technology in partnership with California-based Cadence Design Systems, and the technology is an extension of 3D chip production techniques InFO (Integrated Fan-out) and CoWoS (Chip-on-Wafer-on- Substrate) of the company. The factory announced WoW last year, and now that process is confirmed for production within 2 years.

It is very likely that this technology will fully use the 5nm process, which will allow companies such as Apple, for example, to have chips of up to 10 billion transistors with an area similar to that of the current A12.

Wccftech font