Amd adds zen 2 support to gcc showing some new instructions

With a November deadline for feature freezing, developers of the GNU toolchain are now adding the latest feature additions to GCC 9.0. Before that deadline, AMD has released its first basic patch by adding the "znver2" target and hence Zen 2 support to GCC.

AMD Zen 2 includes some new instructions

This is the basic patch that the next generation AMD Zen CPU introduces to the GCC compiler collection. At this stage it is just the basic implementation and it transfers the same developer data and cost tables from Znver1. Upon reviewing the code, some new CPU instructions are confirmed that will be supported by these next generation Zen CPUs.

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• Cache Line Write (CLWB) Read Processor ID (RDPID) Write Back and No Cache Override (WBNOINVD)

That's it in terms of new instructions, at least what is enabled by these patches. There may be other new Zen 2-compatible instructions that AMD doesn't want to reveal at this time. The patch is currently under gcc-patches, but will likely merge with the GCC mainline before the freeze feature takes effect in mid-November. Synchronization of this patch also reinforces the fact that AMD has begun to increase the availability of Zen 2 for the Linux kernel, and related components of the open source tool chain.

The first expected AMD Zen 2 processors are EPYC 2 at 7nm, and we should hear more about them in early 2019 … considering all the successes we've seen with the Threadripper and EPYC 7000 series on Linux, it will be exciting to see what prices it will have the next generation of EPYC and how fast they will be.

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