First details of the amd zen microarchitecture

We all know that AMD is not going through its best moment, mainly in the CPU market where it is far behind its great rival Intel. Since the arrival of the first AMD FX processors based on the Bulldozer microarchitecture, it has left a bittersweet taste as its CPUs have been vastly surpassed by Intel solutions, especially when it comes to energy efficiency and performance in single-wire applications. In applications that make intensive use of multicore, AMD processors show a performance much closer to that offered by Intel although at the cost of significantly higher power consumption.

For some months now we have known that AMD is working on a new x86 CPU microarchitecture that will succeed Bulldozer and that it should offer much higher performance and energy efficiency. So far the only thing we have known is that the new AMD microarchitecture will be called "Zen" and that it will abandon the CMT technology used in Bulldozer and that it has not given the expected results.

AMD Zen Core Details

There has been an information leak that confirms that AMD Zen will not use CMT technology, so its cores will be complete, looking much more like those used in older AMD Phenom processors than current AMD FX.

The leaked information shows the diagram of the Zen core compared to the Excavator core, the latest evolution of the Bulldozer microarchitecture. The first thing we appreciate when looking at the image is that AMD has abandoned CMT technology in favor of using full cores as we have previously said.

AMD Zen cores have their own charger and instruction decoder (fetch & decode) unlike Excavator, where each two pseudocores module has a single charger for two decoders. Another fundamental difference is that each AMD Zen core has an integer unit and a floating point unit, remember that each Bulldozer module in any of its iterations has a single floating point unit and two integer units.

If we focus on more details we see how the integer unit in Zen has six pipelines unlike Bulldozer that only has four pipelines. In the floating point unit we see even more differences, AMD Zen has two 256-bit fused-multiply accumulate (FMAC) while Excavator has two 128-bit units.

In the cache memory we find other important differences since each AMD Zen core will have 512 KB of L2 compared to 2 MB of L2 present in Excavator. The reduction in the amount of L2 cache suggests that its latency will be less and that Zen cores will be much faster than Excavators, so they will need less cache, as is the case with Intel Haswell, which only has 256 KB of L2 cache..

All these changes compared to Bulldozer should greatly improve the IPC and therefore the performance per core, the Bulldozer's Achilles heel.

The first AMD Zen processors would be quad-core

Another leaked image shows us how the first processors based on the AMD Zen microarchitecture could be. These processors will be based on units formed by four Zen cores that will share the L3 cache among them, specifically an amount of 8 MB for each of these units. quad core and that is the same amount that Intel uses in its Core i7 LGA 1150. The difference with Intel is that each Zen quad core unit has its own individual L3 cache while in Haswell the L3 cache is shared by all the cores, be they two-core or eight-core processors and even sixteen-core processors on the servers.

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The AMD Zen processors would be manufactured by GlobalFoundries / Samsung under a 14nm FinFET process and are expected to arrive alongside a new platform with DDR4 memory support and many PCI-Express 3.0 lines.

Without a doubt AMD presents a design very different from that of the Bulldozer processors and they will come with much newer technologies such as DDR4 memory and a much more advanced manufacturing process, however we will still have to wait to know what really interests us, its performance compared to Intel processors and if it is capable of giving it competition in the mid and high range, something that would certainly benefit our pockets with a price war.

Source: techpowerup I and II